1. Field of the Invention
The present invention relates to a semiconductor device capable of improving output without increasing its package size and causing deterioration of its characteristics and reliability.
2. Background Art
High output semiconductor devices are required to amplify an inputted RF signal and output power of several W to several hundreds of W. The gate width of transistors used for such semiconductor devices needs to be several mm to several hundreds of mm. Transistors having such a large gate width need to be fitted into a package of merely several mm to several tens of mm in size. Thus, one to four or so transistor chips with an array of several tens to a hundred or so of gate fingers having a gate width (gate finger length) of several tens of μm to several hundreds of mm are arranged in a package.
Conventional semiconductor devices have a plurality of transistor chips arranged in a row so that their respective input and output sides are oriented toward the same direction. Moreover, a semiconductor device with chips located before or after each other is also proposed (e.g., see Japanese Patent Laid-Open No. 2007-274181).
Furthermore, in a transistor chip with a plurality of gate fingers arranged in a row, a line length from a gate pad to each gate finger varies from one finger to another, which produces phase differences. Therefore, an idea is proposed that a plurality of gate fingers are arranged in a V shape so as to equalize line lengths from the gate pad to the respective gate fingers (e.g., see Japanese Patent Laid-Open No. 61-104674). It is thereby possible to reduce phase differences and achieve a high gain.